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general description the max5920a/max5920b are hot-swap controllers that allow a circuit card to be safely hot plugged into a live backplane. the max5920a/max5920b operate from -20v to -80v and are well-suited for -48v power systems. these devices are pin and function compatible with the lt4250 and pin compatible with the lt1640. the max5920a/max5920b provide a controlled turn-on to circuit cards preventing glitches on the power-supply rail and damage to board connectors and components. the max5920a/max5920b provide undervoltage, over- voltage, and overcurrent protection. these devices ensure the input voltage is stable and within tolerance before applying power to the load. both the max5920a and max5920b protect a system against overcurrent and short-circuit conditions by turn- ing off the external mosfet in the event of a fault con- dition. the max5920a/max5920b also provide protection against input voltage steps. during an input voltage step, the max5920a/max5920b limit the cur- rent drawn by the load to a safe level without turning off power to the load. both devices feature an open-drain power-good status output ( pwrgd for the max5920a or pwrgd for the max5920b) that can be used to enable downstream converters. a built-in thermal-shutdown feature is also included to protect the external mosfet in case of overheating. the max5920a/max5920b are available in an 8-pin so package. both devices are specified for the extended -40? to +85? temperature range. applications telecom line cards network switches/routers central-office line cards server line cards base-station line cards features allows safe board insertion and removal from a live -48v backplane pin- and function-compatible with lt4250l (max5920a) pin-compatible with lt1640l (max5920a) pin- and function-compatible with lt4250h (max5920b) pin-compatible with lt1640h (max5920b) circuit-breaker immunity to input voltage steps and current spikes withstands -100v input transients with no external components programmable inrush and short-circuit current limits operates from -20v to -80v programmable overvoltage protection programmable undervoltage lockout powers up into a shorted load power-good control output thermal shutdown protects external mosfet max5920 -48v hot-swap controller with external r sense ________________________________________________________________ maxim integrated products 1 gate sense v ee 1 2 8 7 v dd drain ov uv pwrgd (pwrgd) so top view 3 4 6 5 max5920a max5920b ( ) for max5920b. pin configuration ordering information 19-2931; rev 0; 8/03 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package max5920aesa -40 c to +85 c 8 so max5920besa -40 c to +85 c 8 so typical operating circuit and selector guide appear at end of data sheet.
max5920 -48v hot-swap controller with external r sense 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v ee = 0v, v dd = 48v, t a = -40 c to +85 c. typical values are at t a = +25 c, unless otherwise noted.) (notes 1, 4) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. all voltages are referenced to v ee , unless otherwise noted. supply voltage (v dd - v ee ) .................................-0.3v to +100v drain, pwrgd, pwrgd ....................................-0.3v to +100v pwrgd to drain ............................................. -0.3v to +95v pwrgd to v dd ........................................................-95v to +85v sense (internally clamped) .................................-0.3v to +1.0v gate (internally clamped) ....................................-0.3v to +18v uv and ov..............................................................-0.3v to +60v current through sense ...................................................40ma current into gate...........................................................300ma current into any other pin................................................20ma continuous power dissipation (t a = +70 c) 8-pin so (derate 5.9mw/ c above +70 c)..................471mw operating temperature range ...........................-40 c to +85 c junction temperature .....................................................+150 c storage temperature range .............................-65 c to +150 c lead temperature (soldering, 10s) .................................+300 c parameter symbol conditions min typ max units power supplies operating input voltage range v dd 20 80 v supply current i dd (note 2) 0.7 2 ma gate driver and clamping circuits gate pin pullup current i pu gate drive on, v gate = v ee -30 -45 -60 a gate pin pulldown current i pd gate drive off , v gate = 2v 24 50 70 ma external gate drive ? v gate v gate - v ee , 20v v dd 80v 10 13.5 18 v gate to v ee clamp voltage v gsclmp v gate - v ee , i gs = 30ma 15 16.4 18 v circuit breaker current-limit trip voltage v cl v cl = v sense - v ee 40 50 60 mv sense input bias current v sense = 50mv -1 -0.2 0 a undervoltage lockout internal undervoltage lockout voltage high v uvloh v dd increasing 13.8 15.4 17.0 v internal undervoltage lockout voltage low v uvlol v dd decreasing 11.8 13.4 15.0 v uv pin uv high threshold v uvh uv voltage increasing 1.240 1.255 1.270 v uv low threshold v uvl uv voltage decreasing 1.105 1.125 1.145 v uv hysteresis v uvhy_ 130 mv uv input bias current i inuv -0.5 0 a ov pin ov high threshold v ovh ov voltage increasing 1.235 1.255 1.275 v ov low threshold v ovl ov voltage decreasing 1.189 1.205 1.221 v ov voltage reference hysteresis v ovhy 50 mv ov input bias current i inov v ov = v ee -0.5 0 a pwrgd output signal referenced to drain drain input bias current i drain v drain = 48v 10 80 250 a
max5920 -48v hot-swap controller with external r sense _______________________________________________________________________________________ 3 electrical characteristics (continued) (v ee = 0v, v dd = 48v, t a = -40 c to +85 c. typical values are at t a = +25 c, unless otherwise noted.) (notes 1, 4) parameter symbol conditions min typ max units d rain thr eshol d for p ow er - g ood v dl v drain - v ee threshold for power-good condition, drain decreasing 1.1 1.7 2.0 v gate high threshold v gh ? v gate - v gate threshold for power-good condition, ? v gate - v gate decreasing 1.0 1.6 2.0 v pwrgd, pwrgd output leakage i oh pwrgd (max5920a) = 80v, v drain = 48v, pwrgd (max5920b) = 80v, v drain = 0v 10 a pwrgd output low voltage v ol v pwrgd - v ee; v drain - v ee < v dl , i sink = 5ma (max5920a) 0.11 0.4 v pwrgd output low voltage v ol v pwrgd - v drain ; v drain = 5v, i sink = 5ma (max5920b) 0.11 0.4 v overtemperature protection overtemperature threshold t ot junction temperature, temperature rising 135 c overtemperature hysteresis t hys 20 c ac parameters ov high to gate low t phlov figures 1a, 2 0.5 s uv low to gate low t phluv figures 1a, 3 0.4 s ov low to gate high t plhov figures 1a, 2 3.3 s uv high to gate high t plhvl figures 1a, 3 3.4 s sense high to gate low t phlsense figures 1a, 4a 1 3 s current limit to gate low t phlcl figures 1b, 4b 350 500 650 s max5920a, figures 1a, 5a 1.8 drain low to pwrgd low drain low to (pwrgd - drain) high t phldl max5920b, figures 1a, 5a 3.4 s max5920a, figures 1a, 5b 1.6 gate high to pwrgd low gate high to (pwrgd-drain) high t phlgh max5920b, figures 1a, 5b 2.5 s turn-off latch-off period t off (note 3) 128 x t phlcl ms note 1: all currents into device pins are positive; all currents out of device pins are negative. all voltages are referenced to v ee , unless otherwise specified. note 2: current into v dd with uv = 3v, ov, drain, pwrgd, sense = v ee , gate = floating. note 3: minimum duration of gate pulldown following a circuit-breaker fault. the circuit breaker can be reset during this time by toggling uv low, but the gate pulldown does not release until t off has elapsed. note 4: limits are 100% tested at t a = +25 c and +85 c. limits at -40 c are guaranteed by design.
max5920 -48v hot-swap controller with external r sense 4 _______________________________________________________________________________________ typical operating characteristics (v dd = 48v, v ee = 0v, t a = +25 c, unless otherwise noted.) supply current vs. supply voltage max5920 toc01 supply voltage (v) supply current ( a) 80 60 40 20 100 200 300 400 500 600 700 800 900 0 0 100 t a = +85 c t a = +25 c t a = -40 c gate voltage vs. supply voltage max5920 toc02 supply voltage (v) gate voltage (v) 80 60 20 40 8 9 10 11 12 13 14 15 7 0 100 t a = +25 c current-limit trip voltage vs. temperature max5920 toc03 temperature ( c) trip voltage (mv) 60 35 10 -15 47 48 49 50 51 52 53 46 -40 85 gate pullup current vs. temperature max5920 toc04 temperature ( c) gate pullup current ( a) 60 35 10 -15 43.2 43.4 43.6 43.8 44.0 44.2 44.4 44.6 44.8 45.0 43.0 -40 85 v gate = 0v gate pulldown current vs. temperature max5920 toc05 temperature ( c) gate pulldown current (ma) 60 35 10 -15 30 35 40 45 50 55 60 65 70 25 -40 85 v gate = 2v 200 0 10 100 1000 gate pulldown current vs. overdrive 25 max5920 toc06 overdrive (mv) gate pulldown current (ma) 75 50 125 100 175 150 v gate = 2v max5920 pwrgd output low voltage vs. temperature (max5920a) max5920 toc07 temperature ( c) pwrgd output low voltage (mv) 60 35 10 -15 5 10 15 20 25 30 35 40 45 50 0 -40 85 i out = 1ma pwrgd output leakage current vs. temperature (max5920b) max5920 toc08 temperature ( c) pwrgd output leakage current (na) 60 35 10 -15 0.01 0.1 1 10 100 0.001 -40 85 v drain - v ee > 2.4v
max5920 -48v hot-swap controller with external r sense _______________________________________________________________________________________ 5 v s r 5k ? v ov v uv v+ 5v v sense v drain 48v max5920a max5920b pwrgd/pwrgd ov uv v ee v dd drain gate sense figure 1a. test circuit 1 v s v uv 48v max5920a max5920b pwrgd/pwrgd ov uv v ee v dd drain gate sense n irf530 v s 20v 10k ? 10 ? 0.1 f 10 ? figure 1b. test circuit 2
max5920 -48v hot-swap controller with external r sense 6 _______________________________________________________________________________________ timing diagrams 1.255v ov t phlov 0v 2v 1v 1.205v 1v t plhov gate figure 2. ov to gate timing t phluv 1.125v 1v 1v 1.255v t plhuv uv 0v 2v gate figure 3. uv to gate timing 60mv 1v 100mv gate sense v ee t phlsense figure 4a. sense to gate timing t phlcl 1v 1v uv gate figure 4b. active current-limit threshold
max5920 -48v hot-swap controller with external r sense _______________________________________________________________________________________ 7 timing diagrams (continued) drain pwrgd v pwrgd - v drain = 0v pwrgd drain v ee v ee v ee t phldl 1v 1.4v 1.4v t phldl 1v figure 5a. drain to pwrgd /pwrgd timing ? v gate - v gate = 0v gate pwrgd v ee v ee v gate - v gate = 0v gate pwrgd v pwrgd - v drain = 0v 1.4v 1.4v 1v 1v t phlgh t phlgh figure 5b. gate to pwrgd /pwrgd timing logic gate driver uvlo v cc and reference generator ref v cc ref v dl v ee v gh ? v gate 50mv v dd uv ov v ee sense gate drain pwrgd pwrgd max5920a max5920b output drive block diagram
max5920 detailed description the max5920a/max5920b are integrated hot-swap controllers for -48v power systems. they allow circuit boards to be safely hot plugged into a live backplane without causing a glitch on the power-supply rail. when circuit boards are inserted into a live backplane, the bypass capacitors at the input of the board s power module or switching power supply can draw large inrush currents as they charge. the inrush currents can cause glitches on the system power-supply rail and damage components on the board. the max5920a/max5920b provide a controlled turn-on to circuit cards preventing glitches on the power-supply rail and damage to board connectors and components. both the max5920a and max5920b provide undervolt- age, overvoltage, and overcurrent protection. the max5920a/max5920b ensure the input voltage is sta- ble and within tolerance before applying power to the load. the devices also provide protection against input voltage steps. during an input voltage step, the max5920a/max5920b limit the current drawn by the load to a safe level without turning off power to the load. -48v hot-swap controller with external r sense 8 _______________________________________________________________________________________ pin description pin max5920a max5920b name function 1 pwrgd power-good signal output. pwrgd is an active-low open-drain status output referenced to v ee . pwrgd is latched low when v drain - v ee v dl and v gate > ( ? v gate - v gh ), indicating a power-good condition. pwrgd is open drain otherwise. 1 pwrgd power-good signal output. pwrgd is an active-high open-drain status output referenced to drain. pwrgd latches in a high-impedance state when v drain - v ee v dl and v gate > ( ? v gate - v gh ), indicating a power-good condition. pwrgd is pulled low to drain otherwise. 22ov input pin for overvoltage detection. ov is referenced to v ee . when ov is pulled above v ovh voltage, the gate pin is immediately pulled low. the gate pin remains low until the ov pin voltage reduces to v ovl . 33uv input pin for undervoltage detection. uv is referenced to v ee . when uv is pulled above v uvh voltage, the gate is enabled. when uv is pulled below v uvl , gate is pulled low. uv is also used to reset the circuit breaker after a fault condition. to reset the circuit breaker, pull uv below v uvl . the reset command can be issued immediately after a fault condition; however, the device does not restart until a t off delay time has elapsed after the fault. 44v ee device negative power-supply input. connect to the negative power-supply rail. 5 5 sense current-sense voltage input. connect to an external sense resistor and the external mosfet source. the voltage drop across the external sense resistor is monitored to detect overcurrent or short-circuit fault conditions. connect sense to v ee to disable the current- limiting feature. 6 6 gate gate drive output. connect to gate of the external n-channel mosfet. 7 7 drain output-voltage sense input. connect to the output-voltage node (drain of external n-channel mosfet). place the max5920_ so the drain pin is close to the drain of the external mosfet for the best thermal protection. 88v dd positive power-supply rail input. this is the power ground in the negative-supply voltage system. connect to the higher potential of the power-supply inputs.
board insertion figure 6a shows a typical hot-swap circuit for -48v sys- tems. when the circuit board first makes contact with the backplane, the drain to gate capacitance (c gd ) of q1 pulls up the gate voltage to roughly iv ee x c gd / c gd + c gs i. the max5920_ features an internal dynam- ic clamp between gate and v ee to keep the gate-to- source voltage of q1 low during hot insertion, preventing q1 from passing an uncontrolled current to the load. for most applications, the internal clamp between gate and v ee of the max5920a/max5920b eliminates the need for an external gate-to-source capacitor. resistor r3 limits the current into the clamp circuitry during card insertion. power-supply ramping the max5920a/max5920b can reside either on the backplane or the removable circuit board (figure 6a). power is delivered to the load by placing an external n-channel mosfet pass transistor in the power-supply path. after the circuit board is inserted into the backplane and the supply voltage at v ee is stable and within the undervoltage and overvoltage tolerance, the max5920a/max5920b turn on q1. the max5920a/ max5920b gradually turn on the external mosfet by charging the gate of q1 with a 45a current source. capacitor c2 provides a feedback signal to accurately limit the inrush current. the inrush current can be calculated: i inrush = i pu x c l / c2 where c l is the total load capacitance, c3 + c4, and i pu is the max5920_ gate pullup current. figure 6b shows the inrush current waveform. the cur- rent through c2 controls the gate voltage. at the end of the drain ramp, the gate voltage is charged to its final value. the gate-to-sense clamp limits the maxi- mum v gs to about 18v under any condition. board removal if the circuit card is removed from the backplane, the volt- age at the uv pin falls below the uvlo detect threshold, and the max5920_ turns off the external mosfet. current limit and electronic circuit breaker the max5920_ provides current-limiting and circuit- breaker features that protect against excessive load cur- rent and short-circuit conditions. the load current is monitored by sensing the voltage across an external sense resistor connected between v ee and sense. max5920 -48v hot-swap controller with external r sense _______________________________________________________________________________________ 9 v ee sense gate drain v dd ov uv pwrgd max5920b -48v rtn -48v r4 549k ? 1% r5 6.49k ? 1% r6 10k ? 1% r1 0.02 ? 5% r3 1k ? 5% r2 10 ? 5% c1** 470nf 25v q1 irf530 c2 15nf 100v gate in vicor vi-j3d-cy v in+ v in- c4 100 f 100v c3 0.1 f 100v * 10nf -48v rtn (short pin) *diodes inc. smat70a. **optional. figure 6a. inrush control circuitry
max5920 if the voltage between v ee and sense reaches the cur- rent-limit trip voltage (v cl ), the max5920_ pulls down the gate pin and regulates the current through the external mosfet so v sense - v ee < v cl . if the current drawn by the load drops below v cl / r sense limit, the gate pin voltage rises again. however, if the load cur- rent is at the regulation limit of v cl / r sense for a period of t phlcl , the electronic circuit breaker trips, causing the max5920a/max5920b to turn off the external mos- fet. after an overcurrent fault condition, the circuit breaker is reset by pulling the uv pin low and then pulling uv high or by cycling power to the max5920a/max5920b. unless power is cycled to the max5920a/max5920b, the device waits until t off has elapsed before turning on the gate of the external fet. overcurrent fault integrator the max5920_ feature an overcurrent fault integrator. when an overcurrent condition exists, an internal digital counter increments its count. when the counter reaches 500s (the maximum current-limit duration) for the max5920_, an overcurrent fault is generated. if the overcurrent fault does not last 500s, then the counter begins decrementing at a rate 128 (maximum current- limit duty cycle) times slower than the counter was incrementing. repeated overcurrent conditions will gen- erate a fault if duty cycle of the overcurrent condition is greater than 1/128. load-current regulation the max5920a/max5920b accomplish load-current regulation by pulling current from the gate pin when- ever v sense - v ee > v cl (see typical operating characteristics ). this decreases the gate-to-source voltage of the external mosfet, thereby reducing the load current. when v sense - v ee < v cl , the max5920a/max5920b pull the gate pin high by a 45a (i pu ) current. driving into a shorted load in the event of a permanent short-circuit condition, the max5920a/max5920b limit the current drawn by the load to v cl / r sense for a period of t phlcl , after which the circuit breaker trips. once the circuit breaker trips, the gate of the external fet is pulled low by 50ma (i pd ) turning off power to the load. immunity to input voltage steps the max5920a/max5920b guard against input voltage steps on the input supply. a rapid increase in the input supply voltage (v dd - v ee increasing) causes a current step equal to i = c l x ? v in / ? t, proportional to the input voltage slew rate ( ? v in / ? t). if the load current exceeds v cl / r sense during an input voltage step, the max5920a/max5920b current limit activates, pulling down the gate voltage and limiting the load current to v cl / r sense . the drain voltage (v drain ) then slews at a slower rate than the input voltage. as the drain voltage starts to slew down, the drain-to-gate feedback capacitor c2 pushes back on the gate, reducing the gate-to- source voltage (v gs ) and the current through the exter- nal mosfet. once the input supply reaches its final value, the drain slew rate (and therefore the inrush cur- rent) is limited by the capacitor c2 just as it is limited in the startup condition. to ensure correct operation, r sense must be chosen to provide a current limit larger than the sum of the load current and the dynamic current into the load capacitance in the slewing mode. if the load current plus the capacitive charging current is below the current limit, the circuit breaker does not trip. -48v hot-swap controller with external r sense 10 ______________________________________________________________________________________ gate - v ee 10v/div v ee 50v/div drain 50v/div inrush current 1a/div 4ms/div contact bounce figure 6b. input inrush current gate - v ee 4v/div v ee 50v/div inrush current 2a/div 4ms/div contact bounce figure 7a. startup into a short circuit
for c2 values less than 10nf, a positive voltage step on the input supply can result in q1 turning off momentarily, which can shut down the output. by adding an additional resistor and diode, q1 remains on during the voltage step. this is shown as d1 and r7 in figure 9. the pur- pose of d1 is to shunt current around r7 when the power pins first make contact and allow c1 to hold the gate low. the value of r7 should be sized to generate an r7 x c1 time constant of 33s. undervoltage and overvoltage protection the uv and ov pins can be used to detect undervoltage and overvoltage conditions. the uv and ov pins are internally connected to analog comparators with 130mv (uv) and 50mv (ov) of hysteresis. when the uv voltage falls below its threshold or the ov voltage rises above its threshold, the gate pin is immediately pulled low. the gate pin is held low until uv goes high and ov is low, indicating that the input supply voltage is within specifica- tion. the max5920_ includes an internal lockout (uvlo) that keeps the external mosfet off until the input supply voltage exceeds 15.4v, regardless of the uv input. the uv pin is also used to reset the circuit breaker after a fault condition has occurred. the uv pin can be pulled below v uvl to reset the circuit breaker. max5920 -48v hot-swap controller with external r sense ______________________________________________________________________________________ 11 gate - v ee 10v/div i d (q1) 5a/div drain 50v/div 1ms/div figure 7b. short-circuit protection waveform drain 20v/div i d (q1) 5a/div v ee 20v/div 400 s/div figure 8. voltage step-on input supply v ee sense gate drain v dd ov uv pwrgd max5920a -48v rtn -48v r4 549k ? 1% r5 6.49k ? 1% r6 10k ? 1% r1 0.02 ? 5% r3 1k ? 5% r2 10 ? 5% c1 150nf 25v q1 irf530 c2 3.3nf 100v * -48v rtn (short pin) r7 220 ? 5% d1 bat85 c4 22 f 100v c3 0.1 f 100v *diodes inc. smat70a. figure 9. circuit for input steps with small c1
max5920 figure 11 shows how to program the undervoltage and overvoltage trip thresholds using three resistors. with r4 = 549k ? , r5 = 6.49k ? , and r6 = 10k ? , the undervoltage threshold is set to 38.5v (with a 43v release from under- voltage), and the overvoltage is set to 71v. the resistor- divider also increases the hysteresis and overvoltage lockout to 4.5v and 2.8v at the input supply, respectively. pwrgd /pwrgd output the pwrgd (pwrgd) output can be used directly to enable a power module after hot insertion. the max5920a ( pwrgd ) can be used to enable modules with an active-low enable input (figure 13), while the max5920b (pwrgd) is used to enable modules with an active-high enable input (figure 12). the pwrgd signal is referenced to the drain termi- nal, which is the negative supply of the power module. the pwrgd signal is referenced to v ee . when the drain voltage of the max5920a is high with respect to v ee or the gate voltage is low, the internal pulldown mosfet q2 is off and the pwrgd pin is in a high-impedance state (figure 13). the pwrgd pin is -48v hot-swap controller with external r sense 12 ______________________________________________________________________________________ gate 2v/div node1 50v/div 1s/div v ee sense gate drain v dd ov uv pwrgd max5920a -48v rtn -48v rtn (short pin) * -48v *diodes inc. smat70a. r4 549k ? 1% r8 510k ? 5% r5 6.49k ? 1% r6 549k ? 1% r7 1m ? 5% r6 10k ? 1% r1 0.02 ? 5% r3 1k ? 5% r2 10 ? 5% c1 470nf 25v c4 1 f 100v n q1 irf530 d1 1n4148 q2 2n2222 q3 zvn3310 c2 3.3nf 100v c3 100 f 100v p node1 figure 10. automatic restart after current fault v ee v dd ov uv max5920a max5920b -48v rtn -48v v uv = 1.255 r4 + r5 + r6 r5 + r6 r4 r5 r6 -48v rtn (short pin) 3 2 4 8 v ov = 1.255 r4 + r5 + r6 r6 figure 11. undervoltage and overvoltage sensing
max5920 -48v hot-swap controller with external r sense ______________________________________________________________________________________ 13 pwrgd i1 v ee v gh v dl ? v gate -48v r1 r2 c1 q1 r3 c2 max5920b v in+ v in- c3 n q2 q3 n v out+ v out- on/off active-high enable module drain gate sense v ee v dd r4 r5 r6 * *diodes inc. smat70a. -48v rtn -48v rtn (short pin) uv ov figure 12. active-high enable module pwrgd i1 v ee v gh v dl ? v gate -48v r1 r2 c1 q1 r3 c2 max5920a v in+ v in- c3 v out+ v out- on/off active-low enable module drain gate sense v ee v dd r4 r5 r6 * *diodes inc. smat70a. -48v rtn -48v rtn (short pin) uv ov n q2 figure 13. active-low enable module
max5920 pulled high by the module s internal pullup current source, turning the module off. when the drain volt- age drops below v dl and the gate voltage is greater than ? v gate - v gh , q2 turns on and the pwrgd pin pulls low, enabling the module. the pwrgd signal can also be used to turn on an led or optoisolator to indicate that the power is good (figure 14) (see the component selection procedure section). when the drain voltage of the max5920b is high with respect to v ee (figure 12) or the gate voltage is low, the internal mosfet q3 is turned off so that i1 and the inter- nal mosfet q2 clamp the pwrgd pin to the drain pin. mosfet q2 sinks the module s pullup current, and the module turns off. when the drain voltage drops below v dl and the gate voltage is greater than ? v gate - v gh , mosfet q3 turns on, shorting i1 to v ee and turning q2 off. the pullup current in the module pulls the pwrgd pin high, enabling the module. gate pin voltage regulation the gate pin goes high when the following startup con- ditions are met: the uv pin is high, the ov pin is low, the supply voltage is above v uvloh , and (v sense - v ee ) is less than 50mv. the gate is pulled up with a 45a current source and is regulated at 13.5v above v ee . the max5920a/max5920b include an internal clamp that ensures the gate voltage of the external mosfet never exceeds 18v. during a fast-rising v dd , the clamp also keeps the gate and sense potentials as close as possi- ble to prevent the fet from accidentally turning on. when a fault condition is detected, the gate pin is pulled low with a 50ma current. thermal shutdown the max5920a/max5920b include internal die-tempera- ture monitoring. when the die temperature reaches the thermal-shutdown threshold, t ot , the max5920a/ max5920b pull the gate pin low and turn off the external mosfet. if a good thermal path is provided between the mosfet and the max5920a/max5920b, the device offers thermal protection for the external mosfet. placing the max5920a/max5920b near the drain of the external mosfet offers the best thermal protection because most of the power is dissipated in its drain. after a thermal shutdown fault has occurred, the max5920a/max5920b turn the external fet off. to clear a thermal shutdown fault condition, toggle the uv pin or cycle the power to the device. the device keeps the external fet off for a minimum time of t off after uv is toggled, allowing the mosfet to cool down. the device restarts after the temperature drops 20 c below the thermal-shutdown threshold. -48v hot-swap controller with external r sense 14 ______________________________________________________________________________________ v ee sense gate drain v dd ov uv pwrgd max5920a -48v rtn -48v r4 549k ? 1% r5 6.49k ? 1% r6 10k ? 1% r1 0.02 ? 5% r3 1k ? 5% r2 10 ? 5% c1** 470nf 25v q1 irf530 c2 15nf 100v * -48v rtn (short pin) c3 100 f 100v *diodes inc. smat70a. **optional. pwrgd moc207 r7** 51k ? 5% figure 14. using pwrgd to drive an optoisolator
applications information sense resistor the circuit-breaker current-limit threshold is set to 50mv (typically). select a sense resistor that causes a drop equal to or above the current-limit threshold at a current level above the maximum normal operating current. typically, set the overload current to 1.5 to 2.0 times the nominal load current plus the load-capacitance charging current during startup. choose the sense resistor power rating to be greater than (v cl ) 2 / r sense . component selection procedure determine load capacitance: c l = c2 + c3 + module input capacitance determine load current, i load . select circuit-breaker current, for example: i cb = 2 x i load calculate r sense : realize that i cb varies 20% due to trip-voltage tolerance. set allowable inrush current: determine value of c2: calculate value of c1: determine value of r3: set r2 = 10 ? . if an optocoupler is utilized as in figure 14, deter- mine the led series resistor: although the suggested optocoupler is not specified for operation below 5ma, its performance is adequate for 36v temporary low-line voltage where led current would then be 2.2ma to 3.7ma. if r7 is set as high as 51k ? , optocoupler operation should be verified over the expected temperature and input voltage range to ensure suitable operation when led current 0.9ma for 48v input and 0.7ma for 36v input. if input transients are expected to momentarily raise the input voltage to >100v, select an input transient-volt- age-suppression diode (tvs) to limit maximum voltage on the max5920 to less than 100v. a suitable device is the diodes inc. smat70a telecom-specific tvs. select q1 to meet supply voltage, load current, efficien- cy, and q1 package power-dissipation requirements: bv dss 100v i d(on) 3x i load dpak, d 2 pak, or to-220ab the lowest practical r ds(on) , within budget constraints and with values from 14m ? to 540m ? , are available at 100v breakdown. ensure that the temperature rise of q1 junction is not excessive at normal load current for the package select- ed. ensure that i cb current during voltage transients does not exceed allowable transient-safe operating-area limitations. this is determined from the soa and tran- sient-thermal-resistance curves in the q1 manufacturer s data sheet. example 1: i load = 2.5a, efficiency = 98%, then v ds = 0.96v is acceptable, or r ds(on) 384m ? at operating temper- ature is acceptable. an irl520ns 100v nmos with r ds(on) 180m ? and i d(on) = 10a is available in d 2 pak. (a vishay siliconix sud40n10-25 100v nmos with r ds(on) 25m ? and i d(on) = 40a is available in dpak, but may be more costly because of a larger die size). using the irl520ns, v ds 0.625v even at +80 c so efficiency 98.6% at 80 c. p d 1.56w and junction temperature rise above case temperature would be 5 c due to the package jc = 3.1 c/w thermal resistance. of course, using the sud40n10-25 would yield an effi- ciency greater than 99.8% to compensate for the increased cost. r vv ma i ma in nominal led 7 2 35 () = ? ? r s c typically k 3 2 150 1 ( ) ? cccx vv v gd in max gs th gs th 12 =+ ? ? ? ? ? ? ? () () () () c axc i l inrush 2 45 = ix mv r ior ii xi inrush sense load inrush load cb min ? + 08 40 08 . . () r mv i sense cb = 50 max5920 -48v hot-swap controller with external r sense ______________________________________________________________________________________ 15
max5920 if i cb is set to twice i load , or 5a, v ds momentarily dou- bles to 1.25v. if c out = 4000f, transient-line input voltage is ? 36v, the 5a charging-current pulse is: entering the data sheet transient-thermal-resistance curves at 1ms provides a jc = 0.9 c/w. p d = 6.25w, so ? t jc = 5.6 c. clearly, this is not a problem. example 2: i load = 10a, efficiency = 98%, allowing v ds = 0.96v but r ds(on) 96m ? . an irf530 in a d 2 pak exhibits r ds(on) 90m ? at +25 c and 135m ? at +80 c. power dissipation is 9.6w at +25 c or 14.4w at +80 c. junction-to-case thermal resistance is 1.9w/ c, so the junction temperature rise would be approximately 5 c above the +25 c case temperature. for higher efficien- cy, consider irl540ns with r ds(on) 44m ? . this allows = 99%, p d 4.4w, and t jc = +4 c ( jc = 1.1 c/w) at +25 c. thermal calculations for the transient condition yield i cb = 20a, v ds = 1.8v, t = 0.5ms, transient jc = 0.12 c/w, p d = 36w and ? t jc = 4.3 c. layout guidelines good thermal contact between the max5920a/ max5920b and the external mosfet is essential for the thermal-shutdown feature to operate effectively. place the max5920a/max5920b as close as possible to the drain of the external mosfet and use wide circuit-board traces for good heat transfer (see figure 15). t fx v a ms == 4000 1 25 5 1 . -48v hot-swap controller with external r sense 16 ______________________________________________________________________________________ sense resistor high-current path max5920a max5920b sense v ee figure 15. recommended layout for kelvin-sensing current through sense resistor selector guide part pwrgd polarity fault management max5920aesa active low ( pwrgd ) latched max5920besa active high (pwrgd) latched
chip information transistor count: 2645 process: bicmos max5920 -48v hot-swap controller with external r sense ______________________________________________________________________________________ 17 v ee sense gate drain v dd ov uv pwrgd max5920a -48v (input1) -48v (input2) input1 input2 n lucent jw050a1-e v in+ v in- -48v rtn -48v rtn (short pin) backplane circuit card typical operating circuit
max5920 -48v hot-swap controller with external r sense maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2003 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) soicn .eps package outline, .150" soic 1 1 21-0041 b rev. document control no. approval proprietary information title: top view front view max 0.010 0.069 0.019 0.157 0.010 inches 0.150 0.007 e c dim 0.014 0.004 b a1 min 0.053 a 0.19 3.80 4.00 0.25 millimeters 0.10 0.35 1.35 min 0.49 0.25 max 1.75 0.050 0.016 l 0.40 1.27 0.394 0.386 d d mindim d inches max 9.80 10.00 millimeters min max 16 ac 0.337 0.344 ab8.75 8.55 14 0.189 0.197 aa5.004.80 8 n ms012 n side view h 0.2440.228 5.80 6.20 e 0.050 bsc 1.27 bsc c h e e b a1 a d 0-8 l 1 variations:
e nglish ? ???? ? ??? ? ??? what's ne w p roducts solutions de sign ap p note s sup p ort buy comp any me mbe rs m axim > p roduc ts > h ot-swap and p ower switc hing max5920 -48v hot-swap c ontroller with external rsense hot-swap controller with external r sense well-suited for -48v power systems quickview technical documents ordering info more information all ordering information notes: other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales . 1. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 2. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: see full data sheet or part naming c onventions . 3. * some packages have variations, listed on the drawing. "pkgc ode/variation" tells which variation the product uses. 4. devices: 1-18 of 18 m ax5920 fre e sam ple buy pack age : type pins footprint drawing code/var * te m p rohs/le ad-fre e ? m ate rials analys is max5920aesa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5920c esa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5920besa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5920besa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5920aesa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5920aesa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5920fesa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: see data sheet materials analysis max5920fesa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: see data sheet materials analysis max5920eesa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5920eesa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5920desa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: see data sheet materials analysis max5920desa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: see data sheet materials analysis
max5920c esa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5920c esa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5920besa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5920besa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5920aesa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5920c esa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis didn't find what you need? next day product selection assistance from applications engineers parametric search applications help quickview technical documents ordering info more information des c ription key features a pplic ations /u s es key spec ific ations diagram data sheet a pplic ation n otes des ign guides e ngineering journals reliability reports software/m odels e valuation kits p ric e and a vailability samples buy o nline p ac kage i nformation lead-free i nformation related p roduc ts n otes and c omments e valuation kits doc ument ref.: 1 9 -2 9 3 1 ; rev 0 ; 2 0 0 3 -0 9 -1 7 t his page las t modified: 2 0 0 7 -0 8 -1 3 c ontac t us: send us an email c opyright 2 0 0 7 by m axim i ntegrated p roduc ts , dallas semic onduc tor ? legal n otic es ? p rivac y p olic y

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